The semiconductor integrated circuit (IC) industry has experienced rapid growth. In the course of IC evolution, functional density (i.e., the number of interconnected devices per chip area) has generally increased while geometry size (i.e., the smallest component (or line) that can be created using a fabrication process) has decreased. This scaling down process generally provides benefits by increasing production efficiency and lowering associated costs. Such scaling down has also increased the complexity of processing and manufacturing ICs and, for these advances to be realized, similar developments in IC manufacturing are needed.
For example, in semiconductor technologies, a plurality of photomasks (masks) are formed with predesigned IC patterns. The plurality of masks are used during lithography processes to transfer the predesigned IC patterns to multiple semiconductor wafers. The predesigned IC patterns formed on the masks are master patterns. Accordingly, any photomask defects will be transferred to multiple semiconductor wafers, causing yield issues. High precision processes are therefore utilized during mask fabrication, and fabricated masks are inspected for defects after mask fabrication. Conventional mask inspections are performed with scanning electron microscope systems such as electron-beam (e-beam) inspection tools. These imaging systems may produce images of defects on photomasks, but may not efficiently differentiate between different types of defects, such as full-height defects and non-full-height defects. Thus, although existing approaches have been satisfactory for their intended purposes, they have not been entirely satisfactory in all respects.